VD
Dhandapani Vaithiyanathan
National Institute of Technology Delhi, Anna University, Chennai, Sri Sairam Engineering College
0000-0001-5235-2620
Employment
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National Institute of Technology Delhi Assistant Professor2017 - Present
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Anna University, Chennai Teaching Fellow2010 - 2017
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Sri Sairam Engineering College Lecturer2009 - 2010
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Digibee Microsystems Member Technical Staff2006 - 2008
Education
Education history is unavailable.
Projects & Funding
Projects & funding information is unavailable.
Publications (165)
- Device and circuit level investigation of interface trap charge effects on the transport and noise characteristics of JL-NSFETS at sub-5 nm nodes Save
- Compact low-power hardware design for real-time ECG signal pre-processing based on the Pan–Tompkins algorithm Save
- Error prediction in approximate multiplier using regression and feature expansion method Save
- A Comparative Study and FPGA Implementation of Rubik’s Cube-Inspired Image Encryption Techniques Save
- Gate-level error modeling of approximate 4:2 compressors for fault-resilient computing Save
- Design and analysis of sub-threshold level shifter for very high speed and ultra-low power applications Save
- Design and Analysis of Ultra-low Power Dual Edge-triggered D-Flip-Flop for High-speed Applications Save
- 19-transistor single-phase clocking master-slave flip-flop with mixed topology Save
- Secure image encryption using Rubik’s Cube-based scrambling with chaos-driven diffusion and circular shifts Save
- Simulation and Analysis of GaAs‐Au Layer‐HfO2 Dual‐Band Photodetector with High Performance in Visible Spectral Region Save