SR
shirshendu roy
Dayananda Sagar University, Gandhi Institute of Engineering and Technology University, Fanindra Dev Institution, Fanidra Dev Institution, Hindalco Industries Ltd
Employment
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Dayananda Sagar University Assistant Professor2023 - Present
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Gandhi Institute of Engineering and Technology University Assistant Professor2021 - 2022
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Hindalco Industries Ltd Assistant Manager2010 - 2014
Education
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Fanindra Dev Institution Higher Secondary2004 - 2006
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Fanidra Dev Institution Secondary2000 - 2004
Projects & Funding
Projects & funding information is unavailable.
Publications (9)
- Advanced Digital System Design Save
- Neuromorphic Processor Design and FPGA Implementation for Handwritten Digits Employing Spiking Neural Network Save
- Fast OMP algorithm and its FPGA implementation for compressed sensing‐based sparse signal acquisition systems Save
- Parallel and Pipeline Implementations of IIR Low Pass Filter on FPGA Save
- Parallel FPGA Implementation of FIR Filters Save
- A Novel FPGA Implementation of K-means Algorithm Save
- Advanced Digital System Design Save
- Incremental Gaussian Elimination Approach to Implement OMP for Sparse Signal Measurement Save
- Low-Complexity Architecture of Orthogonal Matching Pursuit Based on QR Decomposition Save