Sreenivas Subramoney

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Publications (39)

• TierScape: Harnessing Multiple Compressed Tiers to Tame Server Memory TCO
  2026 DOI: 10.1145/3767295.3769321
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• Ace-of-Spade s: Accelerating Spatially Sparse Convolution for 3D Scene Understanding
  ACM Transactions on Embedded Computing Systems 2026 DOI: 10.1145/3759457
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• Analog and Temporary On-chip Memory for ANN Training and Inference
  ACM Journal on Emerging Technologies in Computing Systems 2025 DOI: 10.1145/3765899
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• TierTrain: Proactive Memory Tiering for CPU-Based DNN Training
  2025 DOI: 10.1145/3735950.3735956
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• Disrupting Low-Write-Energy vs. Fast-Read Dilemma in RRAM to Enable L1 Instruction Cache
  2022 DOI: 10.1007/978-3-031-21514-8_41
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• GenASM: A high-performance, low-power approximate string matching acceleration framework for genome sequence analysis
  Proceedings of the Annual International Symposium on Microarchitecture, MICRO 2020 DOI: 10.1109/MICRO50266.2020.00081
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• Towards Noise Resilient SLAM
  Proceedings - IEEE International Conference on Robotics and Automation 2020 DOI: 10.1109/ICRA40945.2020.9196745
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• PSB-RNN: A Processing-in-Memory Systolic Array Architecture using Block Circulant Matrices for Recurrent Neural Networks
  Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 2020 DOI: 10.23919/DATE48585.2020.9116469
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• Opportunistic early pipeline re-steering for data-dependent branches
  Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT 2020 DOI: 10.1145/3410463.3414628
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• Nanoscale Side-Contact Enabled Three Terminal Pr<inf>0.7</inf>Ca<inf>0.3</inf>MnO<inf>3</inf>Resistive Random Access Memory for In-Memory Computing
  IEEE Electron Device Letters 2020 DOI: 10.1109/LED.2020.3010858
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