PS

Puneet Singh

Indian Institute of Technology Ropar

ORCID iD 0000-0001-5537-4219

Employment

  • Indian Institute of Technology Ropar
    2019 - Present

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (11)

  • Circuit facilitating optimization of data frequency and power consumption and a method thereof
    2025
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  • A linearity improved equalizers for short-channel communication links
    2024 35th Irish Signals and Systems Conference (ISSC) 2024
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  • An active inductor employed CML latch for high speed integrated circuits
    Analog Integrated Circuits and Signal Processing 2023 0 citations DOI: 10.1007/s10470-022-02070-7
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  • A Low Power Differential Delay Cell without Cross-Coupled Latch for Ring VCO
    2023 18th Conference on Ph. D Research in Microelectronics and Electronics (PRIME) 2023
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  • A differential delay cell for ring oscillators
    Authorea Preprints 2023
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  • A double cross-coupled delay cell for high-frequency differential ring vcos
    2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) 2023
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  • A prbs generator using merged XOR-D flip-flop as building blocks
    Circuits, Systems, and Signal Processing 2023
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  • An active inductor employed CML latch for high speed integrated circuits
    Analog Integrated Circuits and Signal Processing 2023
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  • Frequency range enhancement in differential ring VCO while maintaining phase noise performance
    Authorea Preprints 2023
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  • A low power 8$\times$ 2 7-1 PRBS generator using Exclusive-OR gate merged D flip-flops
    2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) 2021
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