Syed Farah Naz

About

Syed Farah Naz (Graduate Student Member, IEEE) is a Postdoctoral Researcher at Ruhr University Bochum, Germany. She received her PhD in Electrical Engineering in Microelectronics and VLSI from the Indian Institute of Technology (IIT) Jammu, India, in 2024. She was awarded the prestigious “PMRF” Fellowship during her PhD. Before that, she received the M.Tech. degree from SMVDU Katra, Jammu, in 2020, and a B.Tech degree from IUST Kashmir, India, in 2018. Her research interests include hardware security, reconfigurable field-effect transistors (RFETs), emerging nanoelectronic technologies, reliability analysis of digital circuits, and low-power VLSI design.

Employment

• Ruhr-Universität Bochum Scientific Researcher
  2025 - Present
• Indian Institute of Technology Jammu Early Postdoctoral Fellow
  2024 - 2024

Education

• Indian Institute of Technology Jammu PhD
  2020 - 2024
• Shri Mata Vaishno Devi University Mtech
  2018 - 2020
• Islamic University of Science and Technology Btech
  2014 - 2018

Projects & Funding

Projects & funding information is unavailable.

Publications (44)

• True random number generators in modern cryptography: A review
  Memories - Materials, Devices, Circuits and Systems 2026 DOI: 10.1016/j.memori.2026.100138
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• Double-node upset and half select issue tolerant split-14T SRAM for avionics applications
  Integration 2026 DOI: 10.1016/j.vlsi.2026.102737
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• Configurable RO-PUF with Improved Thermal Stability for Lightweight Applications
  Proceedings of the International Conference on Microelectronics Icm 2024 DOI: 10.1109/ICM63406.2024.10815902
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• Fault-Tolerant Reversible-Logic Based RO-PUF for Secure Device Authentication
  IEEE Transactions on Circuits and Systems I: Regular Papers 2024 DOI: 10.1109/TCSI.2024.3425957
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• Optimizing Fault Tolerance of RAM cell through MUX based Modeling and Design using symmetries of QCA Cells
  Research Square 2024 DOI: 10.21203/rs.3.rs-3843592/v1
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• Optimizing fault tolerance of RAM cell through MUX based modeling and design using symmetries of QCA cells
  Scientific Reports 2024 DOI: 10.1038/s41598-024-59185-2
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• QCA-based fault-tolerant XOR Gate for reliable computing with high thermal stability
  Physica Scripta 2024 DOI: 10.1088/1402-4896/ad48e8
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• Radiation hardened P-Quatro 12T SRAM cell with strong SEU tolerance for aerospace applications
  Microelectronics Reliability 2024 DOI: 10.1016/j.microrel.2024.115497
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• Secure and Reliable Single-Ended 10T SRAM Cell
  IEEE Electron Devices Technology and Manufacturing Conference Strengthening the Globalization in Semiconductors Edtm 2024 2024 DOI: 10.1109/EDTM58488.2024.10511397
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• Side-Channel Attack Resilient RHBD 12T SRAM Cell for Secure Nuclear Environment
  IEEE Transactions on Device and Materials Reliability 2024 DOI: 10.1109/TDMR.2023.3346752
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