Antony Glittas

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Publications (8)

• High-speed, glitch-free, and low power carbon nanotube based linear phase frequency detector for 6G applications
  Results in Engineering 2025 1 citation DOI: 10.1016/j.rineng.2025.104353
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• A normal I/O order optimized dual-mode pipelined FFT architecture for processing real-valued signals and complex-valued signals
  AEU - International Journal of Electronics and Communications 2023 4 citations DOI: 10.1016/j.aeue.2023.154782
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• A low latency modular-level deeply integrated MFCC feature extraction architecture for speech recognition
  Integration, the VLSI Journal 2021 31 citations DOI: 10.1016/J.VLSI.2020.09.002
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• A power-efficient variable-length prime factor MDC FFT architecture for high-speed wireless communication applications
  AEU - International Journal of Electronics and Communications 2020 3 citations DOI: 10.1016/j.aeue.2020.153194
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• Reconfigurable 2, 3 and 5-point DFT processing element for SDF FFT architecture using fast cyclic convolution algorithm
  Electronics Letters 2020 5 citations DOI: 10.1049/el.2019.4262
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• A Normal I/O Order Radix-2 FFT Architecture to Process Twin Data Streams for MIMO
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2016 46 citations DOI: 10.1109/TVLSI.2015.2504391
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• Two-parallel pipelined fast Fourier transform processors for real-valued signals
  IET Circuits, Devices and Systems 2016 2 citations DOI: 10.1049/iet-cds.2015.0256
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• Pipelined FFT architectures for real-time signal processing and wireless communication applications
  18th International Symposium on VLSI Design and Test, VDAT 2014 2014 6 citations DOI: 10.1109/ISVDAT.2014.6881052
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