MG
maisagalla gopal
SRITW, Indian Institute of Technology Indore, Dr. B. R. Ambedkar National Institute of Technology Jalandhar
0000-0001-6234-9142
About
Dr. M. Gopal is currently working as Associate Professor in the dept. of ECE at SRITW, Warangal. He received his Ph.D. degree from IIT Indore, dept. of Electrical Engineering and M. Tech in VLSI Design from NIT Jalandhar. He is author and co-author of several research papers.
Employment
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SRITW Associate Professor2018 - Present
Education
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Indian Institute of Technology Indore Ph.D2014 - 2018
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Dr. B. R. Ambedkar National Institute of Technology Jalandhar M. TECH2011 - 2013
Projects & Funding
Projects & funding information is unavailable.
Publications (8)
- Half-select free bit-line sharing 12T SRAM with double-adjacent bits soft error correction and a reconfigurable FPGA for low-power applications Save
- A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications Save
- Impact of varying carbon concentration in SiC S/D asymmetric dual-k spacer for high performance and reliable FinFET Save
- SiGe Asymmetric Dual-k Spacer FinFETs-Based 6T SRAM Cell to Mitigate Read-Write Conflict Save
- A 220 mV robust read-decoupled partial feedback cutting based low-leakage 9T SRAM for Internet of Things (IoT) applications Save
- Evaluation of static noise margin of 6T SRAM cell using SiGe/SiC asymmetric dual-k spacer FinFETs Save
- Effect of asymmetric doping on asymmetric underlap Dual-k spacer FinFET Save
- 8T SRAM Cell Design for Dynamic and Leakage Power Reduction Save