CB

Chagun Basha Basheer Ahmed

Also known as: Chagun

Institut d'Electronique et de Télécommunications de Rennes (IETR - CNRS UMR 6164), Institut de Recherche en Informatique et Systmes Alatoires (IRISA - INRIA), Université de Rennes 1

ORCID iD 0000-0001-6600-2883
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Employment

  • Institut d'Electronique et de Télécommunications de Rennes (IETR - CNRS UMR 6164) Research Fellow
    2012 - Present
  • Institut de Recherche en Informatique et Systmes Alatoires (IRISA - INRIA) Research Fellow
    2012 - 2012
  • Processor Systems India Private Limited (ProcSys) Design Engineer
    2010 - 2012
  • Central Electronics Engineering Research Institute Project Intern
    2009 - 2009

Education

  • Université de Rennes 1 PhD
    2012 - Present
  • Bharathidasan University Bachelor of Engineering
    2007 - 2010
  • Government Polytechnic College Dip in Engineering
    2004 - 2007

Projects & Funding

Projects & funding information is unavailable.

Publications (5)

  • Fault-aware Con figurable Logic Block for Reliable Recon figurable FPGAs
    The International Symposium on Circuits and Systems (ISCAS'15) 2015
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  • Built-in 3- Dimensional Hamming Multiple-Error Correcting Scheme to Mitigate Radiation Eff ects in SRAM-Based FPGAs
    The 10th International Symposium on Applied Reconfi gurable Computing (ARC'14) 2014
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  • New Reliable Reconfi gurable FPGA Architecture for Safety and Mission Critical Applications
    The Designing with Uncertainty - Opportunities & Challenges Workshop 2014
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  • New Reconfi gurable Fault Tolerant FPGA Architecture : A Design for Mission Critical Applications
    The 8th HiPEAC Workshop on Recon figurable Computing (WRC'14) 2014
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  • An Overview : Dynamically Recon gurable Fault Tolerant FPGA Architecture
    The 8th CNRS Conference on System-on- Chip & System-in-Package (GDR SoC-SiP'13) 2013
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