JHANSIRANI JENA

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Publications (17)

• Modeling and Performance Analysis of n-FinFETs: A Comparative Study
  2020 DOI: 10.1007/978-981-15-5262-5_57
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• Fin Shape Dependence of Electrostatics and Variability in FinFETs
  Journal of Electronic Materials 2019 DOI: 10.1007/s11664-019-07480-4
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• Vertically-Stacked Silicon Nanosheet Field Effect Transistors at 3nm Technology Nodes
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783300
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• Stress-Induced Variability Studies in Tri-Gate FinFETs with Source/Drain Stressor at 7 nm Technology Nodes
  Journal of Electronic Materials 2019 DOI: 10.1007/s11664-019-07348-7
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• SPICE Parameter Extraction of Tri-Gate FinFETs-An Integrated Approach
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783725
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• Role of Stress/Strain Mapping in Advanced CMOS Process Technology Nodes
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783211
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• Performance and Opportunities of Gate-All-Around Vertically-Stacked Nanowire Transistors at 3nm Technology Nodes
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783385
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• Performance Prediction of Stacked Nanowire Transistors in the Presence of Random Discrete Dopants and Metal Gate Granularity
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783687
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• NBTI Degradation and Recovery in Nanowire FETs
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783566
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• Metal Grain Granularity Induced Variability in Gate-All-Around Si-Nanowire Transistors at 1nm Technology Node
  Proceedings of 3rd International Conference on 2019 Devices for Integrated Circuit, DevIC 2019 2019 DOI: 10.1109/DEVIC.2019.8783717
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