Shivendra Kumar Singh

Employment

• GlobalFoundries Principal Engineer
  2025 - Present
• Cognizant Technology Solutions India Programmer Ananlyst
  2014 - 2017

Education

• National Yang Ming Chiao Tung University Ph.D.
  2022 - 2025
• Indian Institute of Technology Kanpur Ph.D. in MVLSI
  2020 - Present
• National Institute of Technology Srinagar Masters of Technology in Microelectronics
  2018 - 2020

Projects & Funding

Projects & funding information is unavailable.

Publications (13)

• Compact GaN-Based DCFL Amplifier With Direct-Coupled Loads for Wide-Temperature Applications
  IEEE Electron Device Letters 2026 DOI: 10.1109/LED.2025.3641957
  +Save
• Impact of electron and hole trapping on gate reliability of planar SiC MOSFETs
  Materials Science in Semiconductor Processing 2026 DOI: 10.1016/J.MSSP.2026.110641
  +Save
• State-of-the-Art Power Electronics in AI Data Centers
  IEEE Open Journal of Power Electronics 2026 DOI: 10.1109/OJPEL.2026.3720942
  +Save
• A Physics-Based SPICE Compact Model for β-Ga₂O₃ Schottky Barrier Diode (SBD) Aiming at Circuit Design: A Demonstration Through Modeling of AC Rectification Characteristics
  IEEE Transactions on Electron Devices 2025 DOI: 10.1109/TED.2025.3604404
  +Save
• Demonstration of Gate-Related Trap Characterization in 4H-SiC MOSFETs Using Gate Stress Leakage Current
  IEEE Journal of the Electron Devices Society 2025 DOI: 10.1109/JEDS.2024.3486230
  +Save
• Demonstration of accurate ID-VG characteristics modeling in SiC mosfets using separated artificial neural networks with small training dataset
  Scientific Reports 2025 DOI: 10.1038/S41598-025-03005-8
  +Save
• Zero-Power consumption based evaporative cooling for rated current conduction in SiC mosfets
  Scientific Reports 2025 DOI: 10.1038/S41598-025-00946-Y
  +Save
• Characterization and modeling of the mobility, threshold voltage, and subthreshold swing in p-GaN gate HEMTs at cryogenic temperatures
  Applied Physics Letters 2024 DOI: 10.1063/5.0223576
  +Save
• A Self-Consistent Approach Based on Bayesian Deconvolution for Trapping Time Constant Analysis: A Demonstration to Analyze ΔV TH Transients in p-GaN Gate Power HEMTs
  IEEE Transactions on Electron Devices 2024 DOI: 10.1109/TED.2024.3354213
  +Save
• Trapping/Detrapping Kinetic Modeling Under Positive/Negative Gate Stress Including Inhibition Dynamics in 4H-SiC MOS Capacitors
  IEEE Transactions on Electron Devices 2024 DOI: 10.1109/TED.2023.3329782
  +Save