Banavath Shiva Naik

Employment

• Taqanal Energy Pvt. Ltd Technical staff member 2
  2022 - Present

Education

• National Institute of Technology Karnataka Ph.D
  2017 - 2022

Projects & Funding

Projects & funding information is unavailable.

Publications (10)

• A Single Source Self-Balanced Boost MLI with Reduced Part Count for EV Applications
  Sustainability 2023 DOI: 10.3390/su15054149
  +Save
• A Dual Boost Multilevel Inverter Circuit for Renewable Energy Applications
  2020 International Conference on System, Computation, Automation and Networking (ICSCAN) 2020 DOI: 10.1109/icscan49426.2020.9262280
  +Save
• A Novel Switched-Capacitor Boost Multilevel Inverter for PV Applications
  2020 International Conference on System, Computation, Automation and Networking (ICSCAN) 2020 DOI: 10.1109/icscan49426.2020.9262273
  +Save
• Development of Cascaded Multilevel Inverter Based Active Power Filter With Reduced Transformers
  CPSS Transactions on Power Electronics and Applications 2020 DOI: 10.24295/cpsstpea.2020.00013
  +Save
• A Hybrid Nine-level Inverter Topology with Boosting Capability and Reduced Component Count
  IEEE Transactions on Circuits and Systems II: Express Briefs 2020 DOI: 10.1109/tcsii.2020.2998496
  +Save
• Experimental verification of a hybrid multilevel inverter with voltage‐boosting ability
  International Journal of Circuit Theory and Applications 2020 DOI: 10.1002/cta.2748
  +Save
• A Single Stage Switched-Capacitor Hexad Boost Multilevel Inverter Featuring Boost Ability
  2020 IEEE International Conference on Power Electronics, Smart Grid and Renewable Energy (PESGRE2020) 2020 DOI: 10.1109/pesgre45664.2020.9070703
  +Save
• A Fuzzy Logic Based Switching Methodology for a Cascaded H-Bridge Multi-Level Inverter
  IEEE Transactions on Power Electronics 2019 DOI: 10.1109/tpel.2019.2907226
  +Save
• Design and Implementation of a Novel Nine-Level Modified T-type MultilevelInverter with Self Voltage-Balancing Switching Technique
  IET Power Electronics 2019 DOI: 10.1049/iet-pel.2018.6119
  +Save
• Design and implementation of a symmetrical multilevel inverter topology
  2017 International Conference on Inventive Systems and Control (ICISC) 2017 DOI: 10.1109/icisc.2017.8068725
  +Save