Prof. Saurabh Chaudhury
National Institute of Technology Silchar, Indian Institute of Technology Kharagpur
About
Dr. Saurabh Chaudhury was born in Debipur village under Silchar Sub-division in 1971. Graduated from REC Silchar (now NIT Silchar) with Honours in Electrical Engineering in 1993-94. He joined as a lecturer in REC Silchar in 1997, after a brief experience in industry (one year) and teaching (one year). Subsequently he has obtained his M.Tech and Ph.D degree from IIT Kharagpur in the field of Microelectronics & VLSI design in 2001 and 2009 respectively, through QIP program, Govt. of India. Holds regular postion of Professor in the Department of Electrical Engineering since 2018. He has always strived for knowledge, research and dreams big. He is working in the domain of low power VLSI design, synthesis, leakage minimization, Semiconductor Devices and Modelling, CNTs and Digital image processing and applications, IOT and Embedded Systems. He has published more than 50 papers in reputed SCI journals and reviewed many papers in technical journals including IEEE, IET, Elesevier, Springer and many other international conferences.
Employment
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National Institute of Technology Silchar Professor2018 - Present
Education
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Indian Institute of Technology Kharagpur Ph.D2005 - 2008
Projects & Funding
Projects & funding information is unavailable.
Publications (86)
- Fast and High-Performing 1-Bit Full Adder Circuit Based on Input Switching Activity Patterns and Gate Diffusion Input Technique Save
- Investigating the naturally occurring forms of TiO<inf>2</inf>on electronic and optical properties using OLCAO-MGGA-TBO9: A hybrid DFT study Save
- A new 4-2 compressor for vlsi circuits and systems Save
- Modified moth-flame optimization algorithm-based multilevel minimum cross entropy thresholding for image segmentation Save
- Vehicle detection and counting the number of vehicles for intelligent traffic control using labview—an image processing approach Save
- Tuning of Threshold Voltage in Silicon Nano-Tube FET Using Halo doping and its Impact on Analog/RF Performances Save
- Split gated silicon nanotube FET for biosensing applications Save
- Performance enhancement of double-gate tunnel FETs using dual-metal and graded-channel configuration Save
- Improvement in analog/RF performances of SOI TFET using dielectric pocket Save
- Effect of asymmetric gate–drain overlap on ambipolar behavior of double-gate TFET and its impact on HF performances Save