Yue Chen

Employment

Employment history is unavailable.

Education

• Delft University of Technology PhD
  2014 - Present
• Xi'an Jiaotong University Master of Engineering
  2011 - 2014
• Xi'an Jiaotong University Bachelor of Engineering
  2007 - 2011

Projects & Funding

Projects & funding information is unavailable.

Publications (10)

• A Cryo-CMOS Oscillator With an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications
  IEEE Transactions on Circuits and Systems I: Regular Papers 2022 DOI: 10.1109/TCSI.2022.3199997
  +Save
• A Fractional-N Digitally Intensive PLL Achieving 428-fs Jitter and <−54-dBc Spurs Under 50-mVpp Supply Ripple
  IEEE Journal of Solid-State Circuits 2022 DOI: 10.1109/JSSC.2021.3123386
  +Save
• Analysis and Design of Power Supply Circuits for RF Oscillators
  IEEE Transactions on Circuits and Systems I: Regular Papers 2020 DOI: 10.1109/TCSI.2020.3020001
  +Save
• A Switched-Capacitor DC-DC Converter Powering an LC Oscillator to Achieve 85% System Peak Power Efficiency and −65dBc Spurious Tones
  IEEE Transactions on Circuits and Systems I: Regular Papers 2020 DOI: 10.1109/TCSI.2020.3012106
  +Save
• 19.3 A 200dB FoM 4-to-5GHz Cryogenic Oscillator with an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications
  2020 IEEE International Solid- State Circuits Conference - (ISSCC) 2020 DOI: 10.1109/isscc19947.2020.9062913
  +Save
• A Supply Pushing Reduction Technique for <italic>LC</italic> Oscillators Based on Ripple Replication and Cancellation
  IEEE Journal of Solid-State Circuits 2019 DOI: 10.1109/JSSC.2018.2871195
  +Save
• An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order <inline-formula> <tex-math notation="LaTeX">$\Delta\Sigma$ </tex-math> </inline-formula> Loop
  IEEE Transactions on Circuits and Systems I: Regular Papers 2018 DOI: 10.1109/TCSI.2018.2857999
  +Save
• A 350-mV 2.4-GHz quadrature oscillator with nearly instantaneous start-up using series LC tanks
  2017 DOI: 10.1109/ASSCC.2017.8240227
  +Save
• A 3.5–6.8-GHz Wide-Bandwidth DTC-Assisted Fractional-N All-Digital PLL With a MASH ΔΣ -TDC for Low In-Band Phase Noise
  2017 DOI: 10.1109/JSSC.2017.2682841
  +Save
• A 3.5–6.8GHz wide-bandwidth DTC-assisted fractional-N all-digital PLL with a MASH ΔΣ TDC for low in-band phase noise
  2016 DOI: 10.1109/ESSCIRC.2016.7598279
  +Save