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Publications (51)
- A Survey on Different Multiplier Techniques Save
- Implementation of 32-Bit Carry Select Adder using Brent-Kung Adder Save
- Modified Vedic Multiplier using koggstone Adders Save
- Implementation of Dynamic RAMs with clock gating circuits using Verilog HDL Save
- Implementation of 16-Bit Area Efficient Ling Carry Select Adder Save
- Edge Detection in Digital Image Processing Save
- Implementation of 64 Bit KoggeStone Carry Select Adder with BEC for Efficient Area Save
- Multi Directional Wavelet Filter Based Region of Interest Compression for Low Resolution Images Save
- Multi directional wavelet filter based region of interest compression for low resolution images Save
- 128 Bit Area Efficient Carry Select Adder Save