Nisha Yadav

Employment

• J.C. Bose University of Science & Technology, YMCA Assistant Professor
  2017 - Present
• Manav Rachna University Assistant Professor
  2014 - 2017

Education

• J.C. Bose University of Science & Technology, YMCA Ph. D.
  2019 - 2025
• J.C. Bose University of Science & Technology, YMCA M.Tech
  2012 - 2014

Projects & Funding

Projects & funding information is unavailable.

Publications (10)

• 2-D Analytical Surface Potential Modeling and Simulation-Based Optimization of GoP-HD-DMDG-TFET for Enhanced Performance
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2026 DOI: 10.1109/TCAD.2025.3649461
  +Save
• Performance enhancement of junctionless Ge-channel NCFET using ferroelectric spacers for low-power applications
  Micro and Nanostructures 2026 DOI: 10.1016/j.micrna.2026.208774
  +Save
• The Tunnel FET: Fundamentals, Calibration, and Simulation
  Nanoelectronics 2025 DOI: 10.1002/9781394275199.ch11
  +Save
• Linearity performance and harmonic distortion analysis of gate-over-pockets hetero-dielectric dual-metal-double-gate TFET for RF applications
  Micro and Nanostructures 2025 DOI: 10.1016/j.micrna.2025.208074
  +Save
• Steep subthreshold swing Double - Gate tunnel FET using source pocket engineering: Design guidelines
  Micro and Nanostructures 2024 DOI: 10.1016/j.micrna.2024.207951
  +Save
• A Review on Role of Epitaxial Engineering in Improving the Drive Current and Subthreshold Swing in Area Scaled Tunnel FETs
  2023 International Conference on Computer, Electronics & Electrical Engineering & their Applications (IC2E3) 2023 DOI: 10.1109/ic2e357697.2023.10262458
  +Save
• Impact of Gate Length and Doping Variation on the DC and Analog/RF Performance of sub - 3nm Stacked Si Gate-All-Around Nanosheet FET
  Silicon 2023 DOI: 10.1007/s12633-022-01989-w
  +Save
• Geometrical Variability Impact on the Performance of Sub - 3 nm Gate-All-Around Stacked Nanosheet FET
  Silicon 2022 DOI: 10.1007/s12633-022-01770-z
  +Save
• DC and Analog/RF Performance Analysis of Multi-Bridge Channel FET with Variation in Gate Work Function
  2022 International Conference for Advancement in Technology (ICONAT) 2022 DOI: 10.1109/iconat53423.2022.9726102
  +Save
• Simulation and Analysis of Gate Stack DG MOSFET with Application of High-k Dielectric Using Visual TCAD
  High-k Materials in Multi-Gate FET Devices 2021 DOI: 10.1201/9781003121589-7
  +Save