0000-0001-9292-8524 About
Dr R Sivaraman is a Research Scientist at the School of Computing, SASTRA Deemed University, Thanjavur, India. He defended his PhD thesis in "Reconfigurable Hardware Assisted True Random Number Generation" in 2022 from the School of EEE, SASTRA. He completed his PG in VLSI design and UG in ECE in 2016 and 2014, respectively. His research interests are Password-based cryptography, Hardware Security, Hardware entangled cryptography and RISC-V architectures.
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Publications (50)
- Augmenting Security in Edge Devices: FPGA-Based Enhanced LEA Algorithm with S-Box and Chaotic Functions Save
- Characteristic Exploitation of Programmable Delay Line Influenced Oscillator Circuit as Hardware Security Primitive Save
- Wireless Reseeding Scheme for Lightweight PRNG Architecture on FPGA -Design and Analysis Save
- Let wavelet authenticate and tent-map encrypt: a sacred connect against a secret nexus Save
- Encryption + Watermarking: A Duo Approach for Secure Image Communication in Transform Domain Save
- FPGA Governed Edge Device Confidentiality: Lightweight Cryptography with Enhanced Security Save
- Beat Frequency Detection on Boolean Chaotic Oscillator for True Random Number Generation on FPGA Save
- Design of Low-Power 10-Transistor Full Adder Using GDI Technique for Energy-Efficient Arithmetic Applications Save
- Non-Identical Inverter Rings as an Entropy Source: NIST-90B-Verified TRNG Architecture on FPGAs for IoT Device Integrity Save
- Pullikolam assisted medical image watermarking on reconfigurable hardware Save