S.Sridevi Sathya Priya

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Publications (19)

• Review on FSO Techniques and Modulation Schemes for a Fiber-FSO Hybrid Optical Communication System based on FPGA
  Ieie Transactions on Smart Processing and Computing 2025 0 citations DOI: 10.5573/IEIESPC.2025.14.3.297
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• SEMS-DRNet: Attention enhanced multi-scale residual blocks with Bayesian optimization for diabetic retinopathy classification
  Research on Biomedical Engineering 2025 DOI: 10.1007/s42600-025-00434-2
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• Multistage Classification of Diabetic Retinopathy in Fundus Images using Hybrid Capsule Networks
  Journal of Multiscale Modelling 2025 3 citations DOI: 10.1142/S1756973725500064
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• Efficient Implementation of Carry-Skip Adder Using CSMT Adder and PPA
  Advances in Intelligent Systems and Computing 2020 1 citation DOI: 10.1007/978-981-13-7166-0_29
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• FPGA implementation of hardware architecture with AES encryptor using sub-pipelined S-box techniques for compact applications
  Automatika 2020 50 citations DOI: 10.1080/00051144.2020.1816388
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• A Design of low power Adders
  Proceedings of the 4th International Conference on Devices, Circuits and Systems, ICDCS 2018 2019 2 citations DOI: 10.1109/ICDCSyst.2018.8605131
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• Implementation of Efficient Mix Column Transformation for AES encryption
  Proceedings of the 4th International Conference on Devices, Circuits and Systems, ICDCS 2018 2019 6 citations DOI: 10.1109/ICDCSyst.2018.8605077
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• Two stage class AB op-Amp for video applications
  Proceedings of the International Conference on Trends in Electronics and Informatics, ICOEI 2019 2019 3 citations DOI: 10.1109/icoei.2019.8862513
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• High Throughput AES Algorithm Using Parallel Subbytes and MixColumn
  Wireless Personal Communications 2017 5 citations DOI: 10.1007/s11277-016-3858-8
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• An Efficient Hardware Architecture for High Throughput AES Encryptor Using MUX Based Sub Pipelined S-Box
  Wireless Personal Communications 2017 25 citations DOI: 10.1007/s11277-016-3385-7
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