sharvani gadgil

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Publications (9)

• Design and Implementation of a CNTFET-Based Ternary Logic Processor
  TechRxiv 2023 DOI: 10.36227/techrxiv.22259437
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• Power Efficient Designs of CNTFET-Based Ternary SRAM
  TechRxiv 2023 DOI: 10.36227/techrxiv.22013285
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• Power efficient designs of CNTFET-based ternary SRAM
  Microelectronics Journal 2023 DOI: 10.1016/j.mejo.2023.105884
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• Design of CNTFET-based Ternary Logic circuits using Low power Encoder
  Proceedings - 2022 IEEE International Symposium on Smart Electronic Systems, iSES 2022 2022 DOI: 10.1109/iSES54909.2022.00038
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• Novel Design Methodologies for CNFET-Based Ternary Sequential Logic Circuits
  IEEE Transactions on Nanotechnology 2022 DOI: 10.1109/TNANO.2022.3184759
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• Design of CNFET-based Low-Power Ternary Sequential Logic circuits
  Proceedings of the IEEE Conference on Nanotechnology 2021 DOI: 10.1109/NANO51122.2021.9514328
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• A novel low power ternary multiplier design using CNFETs
  Proceedings - 33rd International Conference on VLSI Design, VLSID 2020 - Held concurrently with 19th International Conference on Embedded Systems 2020 DOI: 10.1109/VLSID49098.2020.00022
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• Design of CNTFET-Based Ternary ALU Using 2:1 Multiplexer Based Approach
  IEEE Transactions on Nanotechnology 2020 DOI: 10.1109/TNANO.2020.3018867
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• Design of area optimised, energy efficient quaternary circuits using CNTFETs
  Proceedings - 2019 IEEE International Symposium on Smart Electronic Systems, iSES 2019 2019 DOI: 10.1109/iSES47678.2019.00069
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