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Publications (8)
- Vector-Matrix Multiplier Architecture for In-Memory Computing Applications With RRAM Arrays Save
- An SNN-Inspired Area- and Power-Efficient VLSI Architecture of Myocardial Infarction Classifier for Wearable Devices Save
- A Low-Power Co-Processor to Predict Ventricular Arrhythmia for Wearable Healthcare Devices Save
- Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices Save
- MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications Save
- A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices Save
- An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices Save
- An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications Save