VS
Vijay Sharma
Shri Mata Vaishno Devi University, Atal Bihari Vajpayee Indian Institute of Information Technology and Management
0000-0001-9620-9404
Employment
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Shri Mata Vaishno Devi University
Education
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Atal Bihari Vajpayee Indian Institute of Information Technology and Management
Projects & Funding
Projects & funding information is unavailable.
Publications (12)
- FinFET-Based Low-Power Improved PDP 4:2 Approximate Compressor Design Save
- 4:2 Compressor Design for Low Leakage Applications in FinFET Technology Save
- Improved Stability for Robust and Low-Power SRAM Cell using FinFET Technology Save
- Single‐bit digital comparator circuit design using quantum‐dot cellular automata nanotechnology Save
- Design and Simulation of Reliable Low Power CMOS Logic Gates Save
- Single layer adder/subtractor using QCA nanotechnology for nanocomputing operations Save
- A novel approach for designing of variability aware low‐power logic gates Save
- An Investigation for the Negative-Bias Temperature Instability Aware CMOS Logic Save
- Optimal design for 1:2n demultiplexer using QCA nanotechnology with energy dissipation analysis Save
- A survey of leakage reduction techniques in CMOS digital circuits for nanoscale regime Save