Rishu Chaujar

Employment

Employment history is unavailable.

Education

• University of Delhi Ph.D. Electronics
  2005 - 2009
• University of Delhi M.Sc. Electronics
  2003 - 2005
• University of Delhi B.Sc.(Honours) Electronics
  2000 - 2003

Projects & Funding

Projects & funding information is unavailable.

Publications (185)

• Experimental circuit design and TCAD analysis of ion sensitive field effect transistor (ISFET) for pH sensing
  Materials Science and Engineering: B 2024 DOI: 10.1016/j.mseb.2023.116951
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• TCAD Analysis of Linearity Performance on Modified Ferroelectric Layer in FET Device with Spacer
  Advanced Nanoscale MOSFET Architectures: Current Trends and Future Perspectives 2024
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• DFT based atomic modeling and Analog/RF analysis of ferroelectric HfO2 based improved FET device
  Physica Scripta 2023 DOI: 10.1088/1402-4896/ace5f0
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• Impact of Temperature on Negative Capacitance FET: A TCAD Simulation Study
  2nd Edition of IEEE Delhi Section Owned Conference, DELCON 2023 - Proceedings 2023 DOI: 10.1109/DELCON57910.2023.10127565
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• Analog/RF Performance and Effect of Temperature on Ferroelectric Layer Improved FET device with Spacer
  Silicon 2022 DOI: 10.1007/s12633-022-01822-4
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• Detection of biomolecules in dielectric modulated double metal below ferroelectric layer FET with improved sensitivity
  Journal of Materials Science: Materials in Electronics 2022 DOI: 10.1007/s10854-022-08290-x
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• Linearity Performance of Double Metal Negative Capacitance Field-Effect Transistors: A Numerical Study
  Proceedings of IEEE VLSI DCS 2022: 3rd IEEE Conference on VLSI Device, Circuit and System 2022 DOI: 10.1109/VLSIDCS53788.2022.9811468
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• Temperature Analysis on Short Channel Effects of Modified NCFET : A Simulation Study
  2022 IEEE International Conference on Electronics, Computing and Communication Technologies, CONECCT 2022 2022 DOI: 10.1109/CONECCT55679.2022.9865782
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• A Numerical Study of Analog Parameter of Negative Capacitance Field Effect Transistor with Spacer
  2021 7th International Conference on Signal Processing and Communication, ICSC 2021 2021 DOI: 10.1109/ICSC53193.2021.9673324
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• Analog and RF Performance Evaluation of Junctionless Accumulation Mode (JAM) Gate Stack Gate All Around (GS-GAA) FinFET
  Silicon 2021 DOI: 10.1007/s12633-020-00910-7
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