0000-0002-0400-5664 Employment
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Maharaja Agrasen Institute of Technology Assistant Professor2009 - Present
Education
Education history is unavailable.
Projects & Funding
Projects & funding information is unavailable.
Publications (54)
- Analytical Impact of Temperature on Ferroelectric Junction‐Less Surrounding‐Gate FET: Electrical Perspective Save
- Temperature Induced Transient Analysis of Dual-Metal, Nano-Wire, FET based Inverter Save
- Impact of Interface Trap Charges on Silicon Carbide (4H-SiC) Based Gate – Stack, Dual Metal, Surrounding Gate, FET (4H-SiC- GSDM-SGFET) for Analog and Noise Performance Analysis for 5 G/LTE Applications Save
- Accurate 2-D analytical model for cylindrical gate-junctionless ferroelectric-nanowire (CG-JFe-NW) MOSFET with scaled channel length Save
- Correction to: Improved analog and AC performance for high frequency linearity based applications using gate-stack dual metal (DM) nanowire (NW) FET (4H-SiC) (Microsystem Technologies, (2023), 29, 10, (1403-1416), 10.1007/s00542-023-05480-3) Save
- Dielectric pocket engineered, gate induced drain leakages (GIDL) and analog performance analysis of dual metal nanowire ferroelectric MOSFET (DPE-DM-NW-Fe FET) as an inverter Save
- Dielectric pocket engineered, gate induced drain leakages (GIDL) and analog performance analysis of dual metal nanowire ferroelectric MOSFET (DPE-DM-NW-Fe FET) as an inverter Save
- Modeling and simulation characteristics of a highly-sensitive stack-engineered junctionless accumulation Nanowire FET for PH3Gas Detector Save
- Novel hybrid-CMOS inverter utilizing phase transition material for enhancing digital logic performance at lower operating voltages Save
- Improved analog and AC performance for high frequency linearity based applications using gate-stack dual metal (DM) nanowire (NW) FET (4H-SiC) Save