Suruchi Sharma

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Publications (9)

• Investigation of Charge-plasma Based Dopingless Tunnel FET for Analog/RF and Linear Applications
  Silicon 2022 DOI: 10.1007/s12633-021-01514-5
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• Temperature Analysis of a Dopingless TFET Considering Interface Trap Charges for Enhanced Reliability
  IEEE Transactions on Electron Devices 2022 DOI: 10.1109/TED.2022.3156895
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• Interface trap charges associated reliability analysis of Si/Ge heterojunction dopingless TFET
  IET Circuits, Devices & Systems 2021 DOI: 10.1049/cds2.12037
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• Temperature associated reliability analysis of a Si/Ge Heterojunction Dopingless Tunnel FET considering Interface Trap Charges
  2021 Devices for Integrated Circuit (DevIC) 2021 DOI: 10.1109/devic50843.2021.9455866
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• Insights into temperature influence on analog/RF and linearity performance of a Si/Ge heterojunction asymmetric double gate dopingless TFET
  Applied Physics A 2021 DOI: 10.1007/s00339-021-04541-6
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• Performance Investigation of a Si/Ge Heterojunction Asymmetric Double Gate DLTFET Considering Temperature and ITC Variations
  2021 22nd International Symposium on Quality Electronic Design (ISQED) 2021 DOI: 10.1109/isqed51717.2021.9424354
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• DC and linearity performance of a novel Si0.6Ge0.4/Ge Dopingless Tunnel FET for ultra-low voltage applications
  2021 International Symposium on Devices, Circuits and Systems (ISDCS) 2021 DOI: 10.1109/isdcs52006.2021.9397899
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• PVT Aware Analysis of ISCAS C17 Benchmark Circuit
  Lecture Notes in Mechanical Engineering 2021 DOI: 10.1007/978-981-15-8542-5_107
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• Performance investigation of asymmetric double‐gate doping less tunnel FET with Si/Ge heterojunction
  IET Circuits, Devices & Systems 2020 DOI: 10.1049/iet-cds.2019.0290
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