Arghyadeep Sarkar

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Publications (8)

• Differential Equation-Based Compact 2-D Modeling of Asymmetric Gate Oxide Heterojunction Tunnel FET
  Differential Equation Based Solutions for Emerging Real-Time Problems 2023 DOI: 10.1201/9781003227847-14
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• Modeling of forward gate leakage current for normally off pGaN/AlGaN/GaN HEMTs
  Solid-State Electronics 2022 DOI: 10.1016/j.sse.2022.108420
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• Ab-initio study of LD-HfO2, Al2O3, La2O3 and h-BN for application as dielectrics in MTJ memory device
  Superlattices and Microstructures 2021 DOI: 10.1016/j.spmi.2020.106753
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• Analytical model and sensitivity analysis of a gate-engineered dielectric modulated junctionless nanowire transistor-based biosensor
  Electronic Devices, Circuits, and Systems for Biomedical Applications 2021 DOI: 10.1016/b978-0-323-85172-5.00008-3
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• Effect of Channel Doping and Fin Shapes on Performance of Junctionless Bulk FinFET
  2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS) 2020 DOI: 10.1109/vlsidcs47293.2020.9179912
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• Micro/Nanoelectromechanical Systems
  Nanotechnology 2017 DOI: 10.1201/9781315116730-15
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• High performance AlInN/AlN/GaN p-GaN back barrier Gate-Recessed Enhancement-Mode HEMT
  Superlattices and Microstructures 2014 DOI: 10.1016/j.spmi.2014.07.036
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• Effect of Barrier layer thickness on device performance of AlInN/GaN Underlap DG MOSFET
  2012 International Conference on Communications, Devices and Intelligent Systems (CODIS) 2012 DOI: 10.1109/codis.2012.6422233
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