Dipika Deb

Employment

• Intel (India) Performance Architect
  2021 - Present

Education

• Indian Institute of Technology Guwahati Doctorate Degree (PhD)
  2016 - Present

Projects & Funding

Projects & funding information is unavailable.

Publications (6)

• FlitZip: Effective Packet Compression for NoC in MultiProcessor System-on-Chip
  IEEE Transactions on Parallel and Distributed Systems 2022 DOI: 10.1109/tpds.2021.3090315
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• COPE: Reducing Cache Pollution and Network Contention by Inter-Tile Coordinated Prefetching in NoC-Based MPSoCs
  ACM Trans. Des. Autom. Electron. Syst. 2021 DOI: 10.1145/3428149
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• Cost Effective Routing Techniques in 2D mesh NoC using On-Chip Transmission Lines
  2019
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• ECAP: energy-efficient caching for prefetch blocks in tiled chip multiprocessors
  IET Computers & Digital Techniques 2019 DOI: https://doi.org/10.1049/iet-cdt.2019.0035
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• Performance Enhancement of Caches in TCMPs Using Near Vicinity Prefetcher
  2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) 2019 DOI: 10.1109/VLSID.2019.00021
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• Cache Capacity and its Effects on Power Consumption for Tiled Chip Multi-processors
  2014
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