Vinod Ganesan

Employment

Employment history is unavailable.

Education

• Indian Institute of Technology Madras PhD
  2018 - Present

Projects & Funding

Projects & funding information is unavailable.

Publications (5)

• PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance
  2020 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2020 DOI: 10.1109/host45689.2020.9300263
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• A Case for Generalizable DNN Cost Models for Mobile Devices
  2020 IEEE International Symposium on Workload Characterization (IISWC) 2020 DOI: 10.1109/iiswc50251.2020.00025
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• Brutus: Refuting the Security Claims of the Cache Timing Randomization Countermeasure Proposed in CEASER
  IEEE Computer Architecture Letters 2020
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• Sparsity-aware caches to accelerate deep neural networks
  2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) 2020
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• PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance
  arXiv preprint arXiv:1911.08813 2019
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