MK
MUKESH KUMAR
LeadIC Design Pvt.Ltd., Sri Ramswaroop Memorial Group of Professional Coleges, Sant Longowal Institute of Engineering and Technology, Techno India Group, Jaipur Engineering College and Research Centre
Employment
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LeadIC Design Pvt.Ltd. Trainer cum Analog Layout Engineer2022 - Present
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Sri Ramswaroop Memorial Group of Professional Coleges Assistant Professor2021 - 2022
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Jaipur Engineering College and Research Centre Senior Lecturer2014 - 2015
Education
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Sant Longowal Institute of Engineering and Technology PhD2015 - 2021
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Sant Longowal Institute of Engineering and Technology M.Tech2012 - 2014
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Techno India Group B.Tech2007 - 2011
Projects & Funding
Projects & funding information is unavailable.
Publications (12)
- Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology Save
- Design and analysis of CNTFET based 10T SRAM for high performance at nanoscale Save
- A Survey on Various Approaches of Automatic Optical Inspection for PCB Defect Detection Save
- Comparative analysis of standard 9T SRAM with the proposed low-power 9T SRAM Save
- Consequences of body-biasing technique on SRAM memory Save
- Comparative Analysis of Standard 9T SRAM with the Proposed Low-Power 9T SRAM Save
- Low Power 3-Bit Flash ADC Design with Leakage Power Reduction at 45 nm Technology Save
- Performance evaluation of 6T, 7T & 8T SRAM at 180 nm technology Save
- Analysis of CMOS based NAND and NOR Gates at 45 nm Technology Save
- Performance of 3-phase 4-wire distribution system with DSTATCOM and T-transformer for zero voltage regulation Save