Raj Senani

About

Raj Senani received B.Sc. Engg. from HBTI, Kanpur, M.E. (Honors) from MNNIT, Allahabad and Ph. D. from University of Allahabad- all in Electrical Engineering. Dr. Senani became a Professor in 1990. He has served as Head and Dean of various Departments and Director of the Institute at NSIT, New Delhi, a number of times since 1990. Professor Senani has authored over 200 papers in international journals and as per Google Scholar he has over 7500 citations and h-index of 48. He has been functioning as Editorial reviewer for over 50 international journals, an Associate Editor for Circuits, Systems and Signal Processing (USA), Editor-in-Chief of IETE Journal of Education and an Editor/Member of the Editorial board for 05 other International Journals. Professor Senani is a Senior Member of IEEE (USA), Life Fellow of IETE and an elected Fellow of National Academy of Sciences, India. Professor Senani in February, 2012 was bestowed with the Second Laureate of the 25th Khwarizmi International Award for Fundamental Research. In 2020, 2021, 2022, 2023, 2024 and 2025, he was ranked among the Top 2% Scientists of the world (career-wise) in a report published by the Stanford University and Elsevier researchers. He was given ‘Eminent Engineer of the year 2021’ Award by the Institution of Engineers, India the ‘IETE Life-Time Achievement Award’ by IETE in 2024.

Employment

• Netaji Subhas University of Technology Professor
  1988 - Present

Education

• Motilal Nehru National Institute of Technology Ph.D.
  1985 - 1988

Projects & Funding

Projects & funding information is unavailable.

Publications (135)

• A Simple Circuit Technique of Permeating Linear Tuning Law in CMOS OTA‐C Current‐Controlled Oscillator
  International Journal of Circuit Theory and Applications 2026 DOI: 10.1002/cta.70249
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• An improved multifunction network using two current feedback operational amplifiers
  AEU - International Journal of Electronics and Communications 2025 DOI: 10.1016/j.aeue.2025.156047
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• New electronically fine-tunable CMOS floating resistor configuration and its application
  AEU - International Journal of Electronics and Communications 2025 DOI: 10.1016/j.aeue.2025.155690
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• Chaos Generation via Inductorless Jerk Circuit: The Engineering Approach to Circuit Design and Implementation [CAS Education]
  IEEE Circuits and Systems Magazine 2025 DOI: 10.1109/MCAS.2025.3559469
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• Two New CMOS Synthetic Transformer Designs and their Application
  Circuits, Systems, and Signal Processing 2024 DOI: 10.1007/s00034-024-02761-8
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• An improved CMOS second‐generation current controlled conveyor with enhanced tunable range of RX and its applications
  International Journal of Circuit Theory and Applications 2024 DOI: 10.1002/cta.4001
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• CMOS VM/CM Tow–Thomas-Equivalent Biquad Filters and a Linear VCO Using Recently Proposed CMOS Transconductors
  Journal of Circuits, Systems and Computers 2024 DOI: 10.1142/S0218126624200032
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• New explicit-current-output SRCO using a single CFOA and all grounded capacitors
  AEU - International Journal of Electronics and Communications 2024 DOI: 10.1016/j.aeue.2024.155297
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• Low-Voltage Current-Mode Full-Wave Rectifier Employing FVF-Biased MOS Translinear Loop
  Journal of Circuits, Systems and Computers 2024 DOI: 10.1142/S0218126624200019
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• A low-voltage MOS translinear loop, biased using FVF and its applications in realizing square-rooter and squarer circuits
  Integration 2024 DOI: 10.1016/j.vlsi.2023.102092
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