THIRUVENKADAM KRISHNAN

Employment

• Chennai Institute of Technology Professor
  2024 - Present

Education

• Anna University, Chennai Ph. D
  2014 - 2018

Projects & Funding

Projects & funding information is unavailable.

Publications (21)

• Implementation of imprecise multipliers using 2-bit adder for image processing
  Integration 2026 DOI: 10.1016/j.vlsi.2025.102510
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• Design of Floating-Point Adder Architecture with Multi-mode Capability
  Circuits, Systems, and Signal Processing 2025 DOI: 10.1007/s00034-025-03270-y
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• A hybrid CNN-LSTM predictive model deployed federated learning model for advanced flood prediction systems to forecast coastal region of smart cities
  Global Nest Journal 2025 DOI: 10.30955/gnj.07511
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• Efficient address generator architectures for IEEE 802.16e WiMAX deinterleaver based on SPAM approach
  Analog Integrated Circuits and Signal Processing 2025 DOI: 10.1007/s10470-025-02477-y
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• High Performance Reverse Converter Design Using Modified Brent-Kung EAC Adder
  2025 International Conference on Recent Advances in Electrical Electronics Ubiquitous Communication and Computational Intelligence Raeeucci 2025 2025 DOI: 10.1109/RAEEUCCI63961.2025.11048213
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• Developing and Assessinginexact Multiplierarchitectures for Imageprocessing
  Research Square 2024 DOI: 10.21203/rs.3.rs-4476303/v1
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• Design and realization of area-efficient approximate multiplier structures for image processing applications
  Microprocessors and Microsystems 2023 DOI: 10.1016/j.micpro.2023.104925
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• Design of area-efficient modified decoder-based imprecise multiplier for error-resilient applications
  Microelectronics Journal 2023 DOI: 10.1016/j.mejo.2023.105957
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• Design of Area Efficient Unified Binary/Decimal Adder/Subtractor Using Triple Carry Based Prefix Adder
  8th International Conference on Advanced Computing and Communication Systems, ICACCS 2022 2022 DOI: 10.1109/ICACCS54159.2022.9785045
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• Protection of FPGA IP core using lock and unlock mechanism
  Aip Conference Proceedings 2022 DOI: 10.1063/5.0110027
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