0000-0002-1578-283X Employment
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Publications (23)
- Low-power design and implementation of an enhanced I2C bus controller using open lane: from RTL to GDSII Save
- Approximate median filter architecture with optimized comparator logic for real-time image denoising on FPGA Save
- FPGA-Accelerated Median Filter Design for Removing Random-Valued Impulse Noise in Images: A PYNQ Overlay Framework Approach Save
- Li-Fi technology for automated transport Save
- Efficient VLSI Implementation of Image Denoising Using Hybrid Median Filter Save
- Network Intrusion Detection System Using Optimized Feature Selection Save
- Segmentation and classification of breast cancer using novel deep learning architecture Save
- Savitzky Golay and KPCA based Optimal Discrete Wavelet Transform Architecture for Image Compression Save
- An Efficient VLSI design of Median Filters using 8-bit Data Comparators in Image Applications Save
- A Low Power Clock Gated Median Filter for Gray Level Images Save