MV

Mahendra Vucha

MLR Institute of Technology, Maulana Azad National Institute of Technology

ORCID iD 0000-0002-1595-518X

Employment

  • MLR Institute of Technology Professor

Education

  • Maulana Azad National Institute of Technology PhD

Projects & Funding

Projects & funding information is unavailable.

Publications (21)

  • Distributed optimal relay selection in wireless sensor networks
    Indonesian Journal of Electrical Engineering and Computer Science 2017 DOI: 10.11591/ijeecs.v7.i1.pp71-74
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  • High Speed Architecture for KECCACK Secure Hash Function
    International Journal of Computer Applications 2016
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  • Performance evaluation of circuit level approaches for radiation hardened primitive gates
    Advances in Computing, Communications and Informatics (ICACCI), 2016 International Conference on 2016
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  • A Case Study: Task Scheduling Methodologies for High Speed Computing Systems
    arXiv preprint arXiv:1501.01370 2015
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  • A novel methodology for task distribution in heterogeneous reconfigurable computing system
    International Journal of Embedded Systems and Applications 2015
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  • Design Space Exploration of DSP Techniques for Hardware Software Co-Design: An OFDM Transmitter Case Study
    International Journal of Computer Applications 2015
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  • Dynamic task distribution model for on-chip reconfigurable high speed computing system
    International Journal of Reconfigurable Computing 2015 DOI: 10.1155/2015/783237
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  • Instruction cache design space exploration for embedded software applications
    VLSI Design and Test (VDAT), 2015 19th International Symposium on 2015
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  • Sudeep. M. C Sharath Bimba. M
    2014
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  • Design and FPGA Implementation of High Speed Vedic Multiplier
    International Journal of Computer Applications 2014
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