VK
Venkata Ramakrishna
National Institute of Technology Warangal, National Institute of Technology Sikkim, Jawaharlal Nehru Technological University Hyderabad College of Engineering
0000-0002-2289-6085
Employment
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National Institute of Technology Warangal PhD Scholar2022 - Present
Education
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National Institute of Technology Sikkim Masters2020 - 2022
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Jawaharlal Nehru Technological University Hyderabad College of Engineering B.Tech2015 - 2019
Projects & Funding
Projects & funding information is unavailable.
Publications (30)
- Design of energy-efficient LIF neuron using CMOS compatible gate-all-around floating nanosheet FET for bio-inspired spiking neural networks Save
- Engineering the spacer for junctionless comb-shaped nanosheet FETs at Sub-5 nm node: Device to circuit realization Save
- Ferroelectric/Dielectric Spacer Engineering in Negative capacitance MoS2 FinFETs: An Insight into Digital, Analog/RF and Circuit Applications Save
- Heavy-Ion Radiation-Induced Reliability Assessment of Junctionless Complementary FETs: Device and Circuit Perspective Save
- Role of Dielectric-Semiconductor Interface Traps in Multilayer MoS2 FinFETs: An Investigation From Device to Circuit Save
- Towards the next era of CMOS scaling: A comprehensive review on the emerging landscape of complementary FET technology Save
- Experimental Feasibility-Driven Spacer Material Engineering for Improved Performance in Novel E-shaped Nanosheet FET at Sub-5 Nm Technology Node: Device to Circuit Level Insights Save
- Interface trap dynamics and thermal effects in novel junctionless dual gate inverted-U-shaped FinFETs for sub-5 nm node: device to circuit level implementation Save
- Radiation Hardness on Dielectric/Ferroelectric Stacked Negative Capacitance Multigate Metal-Oxide-Semiconductor FETs at Sub-3-nm Technology Node: Device to CMOS Inverter Layout Save
- Physical insights into optimization of dual metal gate junctionless tree-shaped FETs at sub-5 nm technology node: device to circuit approach Save