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Publications (4)
- Area-Delay-Power Efficient VLSI Architecture of FIR Filter for Processing Seismic Signal Save
- Framework for Automated Earthquake Event Detection Based on Denoising by Adaptive Filter Save
- FPGA-based equalizer design using a novel adaptive reward-punishment VSSLMS algorithm for rayleigh fading channel Save
- FPGA based hardware implementation of adaptive equalizer for Rayleigh fading channel Save