UP
uday panwar
Indian Institute of Information Technology Vadodara, Narsee Monjee Institute of Management Studies, Maulana Azad National Institute of Technology, Sagar Institute of Research and Technology
0000-0002-2850-5700
Employment
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Indian Institute of Information Technology Vadodara Assistant Professor2026 - Present
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Narsee Monjee Institute of Management Studies Assistant Professor2025 - 2026
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Sagar Institute of Research and Technology Professor & Head2015 - 2025
Education
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Maulana Azad National Institute of Technology PhD2011 - 2015
Projects & Funding
Projects & funding information is unavailable.
Publications (21)
- Design and implementation of ternary adder for High-Performance arithmetic applications by using CNTFET material Save
- A Novel Technique to improve Performance Evaluation of Domino Logic Circuits in CMOS and FinFET Technology Save
- Evaluation of electrical characteristics with circuit co-design for ultra low power subthreshold logic Save
- A Novel Technique in Adiabatic Logic for Ultra Low Power in DSM Technology Save
- High Performance VLSI Architecture for Transpose Form FIR Filter using Integrated Module Save
- Integrating flipped drain and power gating techniques for efficient FinFET logic circuits Save
- Performance evaluation of domino logic circuits for wide fan-in gates with FinFET Save
- Diode Switch: A Novel Technique for Mitigation of Leakage Power in DSM Technologies Save
- Gate replacement with PMOS stacking for leakage reduction in VLSI circuits Save
- Power Analysis and Implementation of the 8-bit Toggle Clock Gated ALU Save