anjana bhardwaj

Employment

• GLA University Assistant Professor
  2024 - Present
• Noida institute of engineering Technology Assistant Professor
  2023 - 2024
• Amity University Research Scholar
  2020 - 2024
• ABES EC Assistant Professor
  2012 - 2022

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (21)

• A High-Performance Si0.5Ge0.5 Source Vertical Nanowire TFET for Ultra-Sensitive Biosensing and High-Speed Comparator Applications
  Engineering Research Express 2026 DOI: 10.1088/2631-8695/aea753
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• Material-Driven Performance Analysis of a Vertical Nanowire Tunnel FET for Analog Applications
  Journal of Electronic Materials 2025 DOI: 10.1007/s11664-025-12438-w
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• Smart home with Google Assistant and Alexa Using NodeMCU
  Applications of Artificial Intelligence in 5G and Internet of Things 2025 DOI: 10.1201/9781003532521-56
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• Flood detection and alerting system using IoT
  Applications of Artificial Intelligence in 5G and Internet of Things 2025 DOI: 10.1201/9781003532521-43
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• Design and performance optimization of electrostatically doped vertical nanowire field effect transistors using gate stacking technique
  Applications of Artificial Intelligence in 5G and Internet of Things 2025 DOI: 10.1201/9781003532521-101
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• Temperature Induced Analog Performance Modulation of High- Vertical Nanowire Tunnel FET
  Semiconductors 2025 DOI: 10.1134/S1063782625600020
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• Study of Oxide Material Variation on Electrical Characteristics and Linearity Parameters Induced in Vertical Nanowire TFET
  Semiconductors 2025 DOI: 10.1134/S1063782625600494
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• Numerical Comparative Analysis of 10T-SRAM Cells with 6T, 7T, 8T, and 9T Using Vertical Nanowire Tunnel FETs
  Semiconductors 2025 DOI: 10.1134/S1063782625600299
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• Physics-based Computational Optimization in Dopingless Vertical Nanowire TFET using Triple Metal Gate Architecture
  Semiconductors 2025 DOI: 10.1134/S1063782625600263
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• Reliability analysis of dopingless vertical nanowire TFET with interface trap charges for ring-oscillator circuit implementation
  Microelectronics Reliability 2025 DOI: 10.1016/j.microrel.2025.115840
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