Subir Roy

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Publications (23)

• Defeating HaTCh: Building malicious IP cores
  Communications in Computer and Information Science 2017 DOI: 10.1007/978-981-10-7470-7_34
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• Design approach towards an efficient secure reconfigurable system
  2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings 2017 DOI: 10.1109/RTEICT.2016.7807913
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• Formal verification of switched capacitor DC to DC power converter using circuit simulation traces
  2016 20th International Symposium on VLSI Design and Test, VDAT 2016 2017 DOI: 10.1109/ISVDAT.2016.8064894
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• An efficient FPGA-based function profiler for embedded system applications
  2016 20th International Symposium on VLSI Design and Test, VDAT 2016 2017 DOI: 10.1109/ISVDAT.2016.8064857
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• Non-intrusive FPGA-based profiler for loop execution characterization
  2016 International Conference on VLSI Systems, Architectures, Technology and Applications, VLSI-SATA 2016 2016 DOI: 10.1109/VLSI-SATA.2016.7593046
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• Towards formal verification of adaptive cruise controller using SpaceEx
  2016 International Conference on VLSI Systems, Architectures, Technology and Applications, VLSI-SATA 2016 2016 DOI: 10.1109/VLSI-SATA.2016.7593042
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• Formal verification of analog and mixed signal designs using SPICE circuit simulation traces
  Journal of Electronic Testing: Theory and Applications (JETTA) 2013 DOI: 10.1007/s10836-013-5407-7
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• Incremental optimization of power pads based on adjoint network sensitivity
  2009 1st Asia Symposium on Quality Electronic Design, ASQED 2009 2009 DOI: 10.1109/ASQED.2009.5206259
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• Towards formal verification of analog mixed signal designs using SPICE circuit simulation traces
  2009 1st Asia Symposium on Quality Electronic Design, ASQED 2009 2009 DOI: 10.1109/ASQED.2009.5206276
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• Formal verification of a MEMS based adaptive cruise control system
  Technical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, NSTI-Nanotech, Nanotechnology 2008 2008
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