Linfang Wang

About

Linfang Wang received the B.S. degree in microelectronics science and engineering from the Xi'an Jiaotong University, Xi'an, China, in 2019, and received the Ph.D. degree in microelectronics and solid-sate electronics from Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China, in 2024, He has been a Postdoctoral Research Scientist at Columbia University since September 2024. His research interests include in-memory computing (IMC) circuits and systems and low-power machine-learning hardware.

Employment

• Columbia University Postdoc Research Scientist
  2024 - Present

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (9)

• A 14-nm Nonvolatile-Volatile-Fused Compute-In-Memory Macro Based on Logic-Compatible Flash for Plastic Neural Networks
  IEEE Journal of Solid-State Circuits 2026 DOI: 10.1109/JSSC.2026.3652940
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• A High-Density RRAM Memory Architecture with IO-Assisted-Core-Transistor 1T1R Array and Two-Level Encoding for Edge AI Models
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2026 DOI: 10.1109/TCAD.2026.3660209
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• A near-threshold memristive computing-in-memory engine for edge intelligence
  Nature Communications 2025 DOI: 10.1038/s41467-025-61025-4
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• An RRAM Digital Computing-in-Memory Macro With Dual-Mode Multiplication and Maximum Value Rounding Adder Tree
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2025 DOI: 10.1109/TVLSI.2025.3545866
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• Write–Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2024 DOI: 10.1109/TVLSI.2023.3318744
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• An ADC-Less RRAM-Based Computing-in-Memory Macro With Binary CNN for Efficient Edge AI
  IEEE Transactions on Circuits and Systems II: Express Briefs 2023 DOI: 10.1109/TCSII.2022.3233396
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• A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference
  IEEE Journal of Solid-State Circuits 2023 DOI: 10.1109/JSSC.2023.3280357
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• A 4T2R RRAM Bit Cell for Highly Parallel Ternary Content Addressable Memory
  IEEE Transactions on Electron Devices 2021 DOI: 10.1109/TED.2021.3107497
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• Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage Division in 2T2R RRAM With Input-Dependent Sensing Control
  IEEE Transactions on Circuits and Systems II: Express Briefs 2021 DOI: 10.1109/TCSII.2021.3067385
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