AP
AVINASH PATIL
Army Institute of Technology, Pune, Shivaji University, Dr J J Magdum College of Polytechnic, PVPIT
Research areas: Computer Science · Hardware and Architecture · Low-power high-performance VLSI design · Numerical Methods and Algorithms · Parallel Computing and Optimization Techniques
0000-0002-3757-2323
Employment
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Army Institute of Technology Associate Professor2005 - Present
Education
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Shivaji University Electronics2000 - 2003
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Dr J J Magdum College of Polytechnic Industrial Electronics1999 - 2000
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PVPIT Electronics and Telecommunication1996 - 1999
Projects & Funding
Projects & funding information is unavailable.
Publications (9)
- Acceleration Techniques using Reconfigurable Hardware for Implementation of Floating point multiplier Save
- A Novel Architecture for Multi bit Shift and rotate Operation Save
- Square Operation implementation on Reconfigurable Hardware Logic to Attain high speed, are optimization and low power consumption Save
- Novel Method to Computer Cube Confirming Low Device Utilization on FPGA Save
- Improved algorithm for floating point multiplication Save
- Performance analysis of multiplication operation based on vedic mathematics Save
- Division operation based on Vedic mathematics Save
- External memory interface for RISC controller on reconfigurable hardware logic Save
- Attendance management system Save