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Publications (7)
- Performance enhancement of junctionless silicon nanotube FETs using gate and dielectric engineering Save
- Impact of Doping and Spacer on the Performance of Bulk Planar Junctionless devices Save
- Nanoscale junctionless devices using ringFET structure on bulk silicon substrate Save
- Optimization of nanometer bulk junctionless Trigate FET using gate and isolation dielectric engineering Save
- Effect of eccentricity on junction and junctionless based silicon nanowire and silicon nanotube FETs Save
- Performance optimisation of junctionless FET in nano regime using segmented channel - A 3D numerical simulation study Save
- Optimization of doping profile and isolation oxide thickness in bulk FinFETs using TCAD simulations Save