Chandan Karfa

Employment

Employment history is unavailable.

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (34)

• Formal Modeling of Network-on-Chip Using CFSM and its Application in Detecting Deadlock
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2020 DOI: 10.1109/TVLSI.2019.2959618
  +Save
• Is Register Transfer Level Locking Secure?
  Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 2020 DOI: 10.23919/DATE48585.2020.9116261
  +Save
• Verification of Scheduling of Conditional Behaviors in High-Level Synthesis
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2020 DOI: 10.1109/TVLSI.2020.2978242
  +Save
• Automatic Inverse Operation Detection and its Impact in High-level Synthesis
  2020 24th International Symposium on VLSI Design and Test, VDAT 2020 2020 DOI: 10.1109/VDAT50263.2020.9190276
  +Save
• Verification of parallelising transformations of KPN models
  IET Cyber-Physical Systems: Theory and Applications 2019 DOI: 10.1049/iet-cps.2018.5008
  +Save
• User Guided Register Manipulation in Digital Circuits
  Communications in Computer and Information Science 2019 DOI: 10.1007/978-981-32-9767-8_39
  +Save
• Translation Validation of Code Motion Transformations Involving Loops
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2019 DOI: 10.1109/TCAD.2018.2846654
  +Save
• Improving performance of a path-based equivalence checker using counter-examples
  Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019 2019 DOI: 10.1109/VLSID.2019.00083
  +Save
• Formal verification of optimizing transformations during high-level synthesis
  ACM International Conference Proceeding Series 2019 DOI: 10.1145/3299771.3299797
  +Save
• Counter-example generation procedure for path-based equivalence checkers
  IET Software 2019 DOI: 10.1049/iet-sen.2018.5203
  +Save