Nivedita Rai (Nivedita Jaiswal)

About

My current research area includes modeling and simulation of nanoscale transistors.

Employment

• Indian Institute of Technology Indore Research Associate
  2021 - 2023

Education

• Shri Govindram Seksaria Institute of Technology and Science M.Tech.
  2013 - 2015
• Lakshmi Narain College of Technology B.E.
  2008 - 2012

Projects & Funding

Projects & funding information is unavailable.

Publications (12)

• Pragmatic Evaluation of Process Corners in ULP Subthreshold Circuits With Quantum Confinement Effects in Junctionless Nanowire Transistor
  IEEE Transactions on Circuits and Systems I: Regular Papers 2024 DOI: 10.1109/TCSI.2023.3328584
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• Architectural evaluation of programmable transistor-based capacitorless DRAM for high-speed system-on-chip applications
  Japanese Journal of Applied Physics 2023 DOI: 10.35848/1347-4065/acb0db
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• Sensitivity implications for programmable transistor based 1T-DRAM
  Solid-State Electronics 2022 DOI: 10.1016/j.sse.2022.108353
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• Incorporating Quantum Effects in Ultralow Power (ULP) Subthreshold Logic Design With Junctionless Nanowire Transistor
  IEEE Transactions on Electron Devices 2022 DOI: 10.1109/TED.2022.3172045
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• Ultra-low-power subthreshold logic with germanium junctionless transistors
  Semiconductor Science and Technology 2021 DOI: 10.1088/1361-6641/abfd16
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• Limits on Hysteresis-Free Sub-60 mV/Decade Operation of MFIS Nanowire Transistor
  IEEE Transactions on Electron Devices 2020 DOI: 10.1109/TED.2020.3008888
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• Gate-All-Around Nanowire Junctionless Transistor-Based Hydrogen Gas Sensor
  IEEE Sensors Journal 2019 DOI: 10.1109/JSEN.2019.2903216
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• Modeling Short-Channel Effects in Core–Shell Junctionless MOSFET
  IEEE Transactions on Electron Devices 2019 DOI: 10.1109/TED.2018.2881006
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• Modeling Short-Channel Effects in Asymmetric Junctionless MOSFETs With Underlap
  IEEE Transactions on Electron Devices 2018 DOI: 10.1109/TED.2018.2856839
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• A Model for Gate-Underlap-Dependent Short- Channel Effects in Junctionless MOSFET
  IEEE Transactions on Electron Devices 2018 DOI: 10.1109/TED.2018.2796602
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