SUMALYA GHOSH

Employment

• National Institute of Technology Durgapur Lab. Engineer, SMDP-C2SD
  2019 - Present

Education

• National Institute of Technology PhD
  2012 - 2020

Projects & Funding

Projects & funding information is unavailable.

Publications (7)

• Optimal design of complementary metal-oxide-semiconductor analogue circuits: An evolutionary approach
  Computers & Electrical Engineering 2019 14 citations DOI: 10.1016/j.compeleceng.2019.106485
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• Symbiotic Organisms Search Algorithm for Optimal Design of CMOS Two-stage Op-amp with Nulling Resistor and Robust Bias Circuit
  IET Circuits, Devices & Systems 2019
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• Optimal design of a 5.5-GHz low-power high-gain CMOS LNA using the flower pollination algorithm
  Journal of Computational Electronics 2019 14 citations DOI: 10.1007/s10825-019-01322-6
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• Design of low-noise amplifier with high CMRR for sensor application
  Lecture Notes in Electrical Engineering 2018 2 citations DOI: 10.1007/978-981-10-8240-5_1
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• Amplifier design optimization in CMOS
  Advances in Intelligent Systems and Computing 2015 0 citations DOI: 10.1007/978-81-322-2268-2_31
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• Analog amplifier design in short-channel MOSFET using alpha-power model
  2nd International Conference on Electronics and Communication Systems, ICECS 2015 2015 0 citations DOI: 10.1109/ECS.2015.7124806
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• Voltage-controlled ring oscillator for harmonic frequency generation
  Advances in Intelligent Systems and Computing 2015 4 citations DOI: 10.1007/978-81-322-2268-2_30
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