Mustafa Ali

Employment

• Purdue University PhD Student at Center of Brain-Inspired Computing (C-BRIC)
  2018 - Present
• Military Technical College Associate Lecturer
  2016 - 2017
• Military Technical College Teaching and Research Assistant
  2013 - 2016

Education

• Purdue University PhD
  2018 - Present
• Military Technical College M.Sc.
  2014 - 2016

Projects & Funding

Projects & funding information is unavailable.

Publications (15)

• What, When, Where to Compute-in-Memory for Efficient Matrix Multiplication During Machine Learning Inference
  IEEE Transactions on Emerging Topics in Computing 2025 DOI: 10.1109/TETC.2025.3574508
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• LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update
  IEEE Transactions on Computers 2022 DOI: 10.1109/TC.2022.3202747
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• Compute-in-Memory Technologies and Architectures for Deep Learning Workloads
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2022 DOI: 10.1109/TVLSI.2022.3203583
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• PIM-DRAM: Accelerating Machine Learning Workloads Using Processing in Commodity DRAM
  IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2021 DOI: 10.1109/JETCAS.2021.3127517
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• A 35.5-127.2 TOPS/W Dynamic Sparsity-Aware Reconfigurable-Precision Compute-in-Memory SRAM Macro for Machine Learning
  IEEE Solid-State Circuits Letters 2021 DOI: 10.1109/LSSC.2021.3093354
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• IMPULSE: A 65-nm Digital Compute-in-Memory Macro With Fused Weights and Membrane Potential for Spike-Based Sequential Learning Tasks
  IEEE Solid-State Circuits Letters 2021 DOI: 10.1109/LSSC.2021.3092727
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• Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges
  Proceedings of the IEEE 2020 DOI: 10.1109/JPROC.2020.3003007
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• i-SRAM: Interleaved Wordlines for Vector Boolean Operations Using SRAMs
  IEEE Transactions on Circuits and Systems I: Regular Papers 2020 DOI: 10.1109/TCSI.2020.3005783
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• IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array
  IEEE Transactions on Circuits and Systems I: Regular Papers 2020 DOI: 10.1109/TCSI.2020.2981901
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• In-Memory Low-Cost Bit-Serial Addition Using Commodity DRAM Technology
  IEEE Transactions on Circuits and Systems I: Regular Papers 2020 DOI: 10.1109/TCSI.2019.2945617
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