Neetika Yadav

Employment

• Amity school of engineering and technology, delhi Assistant Professor
  2018 - Present

Education

• Delhi Technological University PhD
  2019 - Present
• Centre for Development of Advanced Computing Centre at Noida M.TECH.
  2015 - 2017
• Indira Gandhi institute of technology (now IGDTUW) B.TECH.
  2010 - 2014

Projects & Funding

Projects & funding information is unavailable.

Publications (10)

• CNTFET Based M-DMTGDI (CMDMTGDI) Design and Its Leakage Analysis
  Proceedings of the 10th International Conference on Signal Processing and Integrated Networks, SPIN 2023 2023 DOI: 10.1109/SPIN57001.2023.10116812
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• Energy Efficient CNTFET based Dual Mode Logic (C-DML) Design
  2023 2nd International Conference on Electrical, Electronics, Information and Communication Technologies, ICEEICT 2023 2023 DOI: 10.1109/ICEEICT56924.2023.10157144
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• Energy Efficient Dual Mode DCVSL (DM-DCVSL) design
  2023 2nd International Conference on Electrical, Electronics, Information and Communication Technologies, ICEEICT 2023 2023 DOI: 10.1109/ICEEICT56924.2023.10157481
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• LDML: A Proposal to Reduce Leakage Power in DML Circuits
  Wireless Personal Communications 2023 DOI: 10.1007/s11277-023-10170-4
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• Modified Dual Mode Transmission Gate Diffusion Input Logic for Improving Energy Efficiency
  Journal of Circuits, Systems and Computers 2023 DOI: 10.1142/S0218126623501712
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• CNTFET based Transmission Gate Diffusion Input Logic (C-TGDI) design
  2021 5th International Conference on Electrical, Electronics, Communication, Computer Technologies and Optimization Techniques, ICEECCOT 2021 - Proceedings 2021 DOI: 10.1109/ICEECCOT52851.2021.9707944
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• LCNT incorporated domino with footed diode inverter
  Proceedings of the 8th International Conference on Signal Processing and Integrated Networks, SPIN 2021 2021 DOI: 10.1109/SPIN52536.2021.9566034
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• Leakage reduction in dual mode logic through gated leakage transistors
  Microprocessors and Microsystems 2021 DOI: 10.1016/j.micpro.2021.104269
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• Design of ALU using dual mode logic with optimized power and speed
  IMPACT 2017 - International Conference on Multimedia, Signal Processing and Communication Technologies 2018 DOI: 10.1109/MSPCT.2017.8363970
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• Design of Dual Master I2C Bus Controller and Interfacing it with DC Motor
  Proceedings - IEEE 2018 International Conference on Advances in Computing, Communication Control and Networking, ICACCCN 2018 2018 DOI: 10.1109/ICACCCN.2018.8748677
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