Employment
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National Institute of Technology Delhi Assistant Professor2017 - Present
Education
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Publications (22)
- Interface trap charges associated reliability analysis of Si/Ge heterojunction dopingless TFET Save
- Design and mathematical analysis of a 7T SRAM cell with enhanced read SNM using PMOS as an access transistor Save
- Temperature associated reliability analysis of a Si/Ge Heterojunction Dopingless Tunnel FET considering Interface Trap Charges Save
- Insights into temperature influence on analog/RF and linearity performance of a Si/Ge heterojunction asymmetric double gate dopingless TFET Save
- Performance Investigation of a Si/Ge Heterojunction Asymmetric Double Gate DLTFET Considering Temperature and ITC Variations Save
- DC and linearity performance of a novel Si0.6Ge0.4/Ge Dopingless Tunnel FET for ultra-low voltage applications Save
- PVT Aware Analysis of ISCAS C17 Benchmark Circuit Save
- Investigation of Charge-plasma Based Dopingless Tunnel FET for Analog/RF and Linear Applications Save
- A Novel Design of Fast and Low Power Pull-Up and Pull-Down Voltage Level Shifter Save
- Design and Investigation of Tunnel Junction Engineered Dopingless-TFET with Improved DC and RF/Analog Parameters Analysis Save