Abhijit Asati

About

Dr. Abhijit Asati completed Ph.D. degree in VLSI ( 2010) and M.E. degree in Microelectronics (2002) from BITS Pilani. Prior to this he completed B.E. degree in electrical engineering from Amravati university in the year 1996. He has more than 22 years of experience in academia and currently working as 'Professor' in the 'Electrical and Electronics Engineering Department' at BITS Pilani. He also served as a faculty member at the Visveswarya National Institute of Technology, Nagpur from 1997 to 1999. He taught several courses such as Electrical Sciences, Microelectronic Circuits, Analog and digital VLSI design, Electronic Devices, CAD for IC Design, VLSI test and testability. Dr. Asati supervised 4 Ph. D. thesis and currently supervising 4 research scholar. He also supervised around 35 B.E. and M.E. thesis.
He contributed more than 40 journal papers and more than 50 conference papers in the area of microelectronics, VLSI design and embedded system. His research contributions are in the area of high performance/low power VLSI design, microprocessor design, NBTI degradation issues and biometric identification. He visited "Cypress Semiconductor Limited, Bangalore", from May to July 2014 as a part of Industry Immersion Program of BITS, Pilani. He was also Visiting Assistant Professor "University of Virginia, Charlottesvillie", from May to July 2018 as a part of University Immersion Program of BITS, Pilani. He is senior member IEEE and member for IEEE Solid-State Circuits Society.

Employment

• Birla Institute of Technology and Science, Pilani Pfrofessor
  2023 - Present
• Birla Institute of Technology & Science Pilani Associate Professor
  2018 - 2022
• Birla Institute of Technology and Science Assistant Professor
  2010 - 2018
• Birla Institute of Technology and Science Lecturer
  2002 - 2010
• Visvesvaraya National Institute of Technology Lecturer
  1997 - 1999

Education

• Birla Institute of Technology and Science ME
  2000 - 2002

Projects & Funding

Projects & funding information is unavailable.

Publications (100)

• Advanced CNN Architecture for Intelligent Driver Drowsiness Detection
  Electronics Letters 2026 DOI: 10.1049/ell2.70516
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• HLS-Based Resource Optimized High-performance FPGA Implementation of Convolution Layer for CNN Applications
  Proceedings of the National Academy of Sciences, India Section A: Physical Sciences 2026 DOI: 10.1007/s40010-026-01121-2
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• Novel Low Power SRAM Cells in 16 nm CMOS Technology
  2026 DOI: 10.1007/978-981-96-9191-3_31
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• A High-Speed, Low-Power Pipelined CNN Implementation on FPGA Using On-Chip Processing and Layer-Wise Streaming Control
  IEEE Access 2026 DOI: 10.1109/ACCESS.2026.3716395
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• FPGA-Based Implementation of Modular Multiplier for CRYSTALS-Kyber
  Lecture Notes in Networks and Systems 2026 DOI: 10.1007/978-981-95-3492-0_22
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• FPGA-Based Implementation of Single-Cycle High-Throughput LDPC Encoder for 5G New Radio
  IEEE Embedded Systems Letters 2025 DOI: 10.1109/LES.2025.3546543
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• Power, delay Optimized MBIST Controller Architecture using March Algorithms
  2025 2nd International Conference on Recent Trends in Electrical, Electronics and Computing Technologies (ICRTEECT) 2025 DOI: 10.1109/icrteect67512.2025.11448959
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• Improved Implementation of PYNQ-Based FFT Hardware Accelerator
  2024 2nd International Conference on Device Intelligence, Computing and Communication Technologies (DICCT) 2024 DOI: 10.1109/dicct61038.2024.10532842
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• Convolutional Neural Network Hardware Optimization Using Bayesian Method
  2024 Second International Conference on Emerging Trends in Information Technology and Engineering (ICETITE) 2024 DOI: 10.1109/ic-etite58242.2024.10493483
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• Design and Analysis of a Scan Chain in Subthreshold Region
  2023 3rd International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON) 2023 DOI: 10.1109/smartgencon60755.2023.10442861
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