Ravi Shankar Mishra

Employment

• JNCT Professional University Professor
  2026 - Present
• Sagar Institute of Science and Technology PROFESSOR
  2020 - Present
• Guru Nanak Institutions PROFESSOR
  2019 - 2020
• Symbiosis University of Applied Sciences PROFESSOR
  2017 - 2019
• Lovely Professional University Associate Professor
  2015 - 2017

Education

• Maulana Azad National Institute of Technology Ph.D.
  2007 - 2011
• Maulana Azad National Institute of Technology M.Tech.
  2002 - 2005

Projects & Funding

Projects & funding information is unavailable.

Publications (27)

• Array and Wearable Antennas: Design, Optimization, and Applications
  Array and Wearable Antennas Design Optimization and Applications 2024 DOI: 10.1201/9781003422440
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• Design and Analysis of Low Power MAC for DSP Processor
  2023 International Conference on Artificial Intelligence and Applications Icaia 2023 and Alliance Technology Conference Atcon 1 2023 Proceeding 2023 DOI: 10.1109/ICAIA57370.2023.10169461
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• Hybrid GDI PTL Full Adder: A Proposed Design for Low Power Applications
  International Journal of Performability Engineering 2022 DOI: 10.23940/ijpe.22.01.p3.2229
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• Delay reduction by implementation of voltage-controlled ring oscillator with reverse substrate bias
  International Journal of Performability Engineering 2020 DOI: 10.23940/ijpe.20.03.p1.325332
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• Challenge-Response Pair (CRP) Generator Using Schmitt Trigger Physical Unclonable Function
  Advanced Computing and Communication Technologies 2019 DOI: 10.1007/978-981-13-0680-8_20
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• Design and simulation of low power voltage controlled oscillator for biomedical applications
  Proceedings 2nd International Conference on Intelligent Circuits and Systems Icics 2018 2018 DOI: 10.1109/ICICS.2018.00038
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• METAPUF a challenge response pair generator
  Periodicals of Engineering and Natural Sciences 2018 DOI: 10.21533/pen.v6i2.176
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• Comparative analysis of different algorithm for design of high-speed Multiplier Accumulator unit (MAC)
  Indian Journal of Science and Technology 2016 DOI: 10.17485/ijst/2016/v9i8/83614
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• PUF based challenge response pair for secured authentication
  International Journal of Control Theory and Applications 2016
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• Design of a high performance 4 bit multiplier using UT algorithm with domino logic
  7th IEEE Annual Information Technology Electronics and Mobile Communication Conference IEEE Iemcon 2016 2016 DOI: 10.1109/IEMCON.2016.7746089
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