Dhirendra Kumar

About

EDUCATION :

Ph.D. in Electronics and Communication Engineering (VLSI Design), Indian Institute of Information Technology, Allahabad, U.P., India, 2022.
Topic- Design of True Random Number Generator with Improved Performance

M.Tech. in Microelectronics and VLSI Design, Indian Institute of Information Technology, Allahabad, U.P., India, 2017
B.Tech. in Electronics and Communication Engineering, West Bengal University of Technology, Kolkata, India, 2012

Employment

• GLA University Assistant Professor
  2022 - Present
• Indian Institute of Information Technology Allahabad Dual Degree MTech-PhD
  2015 - 2021

Education

Education history is unavailable.

Projects & Funding

Projects & funding information is unavailable.

Publications (9)

• Bernoulli Map Based Power Efficient True Random Number Generator Using Cascode Current Mirror Topology
  2024 15th International Conference on Computing Communication and Networking Technologies (ICCCNT) 2024 DOI: 10.1109/icccnt61001.2024.10725603
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• Design of Hexagonal Oscillator for True Random Number Generation
  2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) 2022 DOI: 10.1109/icecs202256217.2022.9971060
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• Design of True Random Number Generator Using Fingerprint as an Entropy Source and Its Implementation in S-Box
  Journal of Circuits, Systems and Computers 2021 DOI: 10.1142/s0218126621502856
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• Design of Energy Efficient True Random Number Generator using MUX-Metastable Approach
  2021 8th International Conference on Signal Processing and Integrated Networks (SPIN) 2021 DOI: 10.1109/spin52536.2021.9566149
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• A 0.7 pJ/bit, 1.5 Gbps Energy-Efficient Image-Based True Random Number Generator
  IETE Journal of Research 2020 DOI: 10.1080/03772063.2020.1859957
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• 0.4 mW, 0.27 pJ/bit true random number generator using jitter, metastability and current starved topology
  IET Circuits, Devices & Systems 2020 DOI: 10.1049/iet-cds.2019.0318
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• Opto-Radio Noise based True Random Number Generator
  2020 24th International Symposium on VLSI Design and Test (VDAT) 2020 DOI: 10.1109/vdat50263.2020.9190346
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• A 138 Mbps jitter based power efficient true random number generator
  2020 International Conference on Electronics, Information, and Communication (ICEIC) 2020 DOI: 10.1109/iceic49074.2020.9152937
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• Modified Tent Map Based Design for True Random Number Generator
  2018 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS) 2018 DOI: 10.1109/ises.2018.00016
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