bhupendra reniwal

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Publications (14)

• Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design
  Integration 2018 DOI: 10.1016/j.vlsi.2018.03.006
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• A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM
  Proceedings - 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems, VLSID 2017 2017 DOI: 10.1109/VLSID.2017.54
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• Design and investigation of variability aware sense amplifier for low power, high speed SRAM
  Microelectronics Journal 2017 DOI: 10.1016/j.mejo.2016.11.009
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• Dynamic feedback controlled static random access memory for low power applications
  Journal of Low Power Electronics 2017 DOI: 10.1166/jolpe.2017.1470
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• Impact of device engineering on analog/RF performances of tunnel field effect transistors
  Semiconductor Science and Technology 2017 DOI: 10.1088/1361-6641/aa66bd
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• Analogue/RF performance attributes of underlap tunnel field effect transistor for low power applications
  Electronics Letters 2016 DOI: 10.1049/el.2015.3797
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• Nanoscale Memory Design for Efficient Computation: Trends, Challenges and Opportunity
  Proceedings - 2015 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2015 2016 DOI: 10.1109/iNIS.2015.58
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• Ultra-Fast Current Mode Sense Amplifier for Small I<inf>CELL</inf>SRAM in FinFET with Improved Offset Tolerance
  Circuits, Systems, and Signal Processing 2016 DOI: 10.1007/s00034-015-0199-x
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• An offset-tolerant self-correcting sense amplifier for robust high speed SRAM
  19th International Symposium on VLSI Design and Test, VDAT 2015 - Proceedings 2015 DOI: 10.1109/ISVDAT.2015.7208082
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• Dataline isolated differential current feed/mode sense amplifier for small I<inf>cell</inf>SRAM using FinFET
  Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI 2015 DOI: 10.1145/2742060.2742104
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