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Publications (43)
- Standard cell library based processor design using MGDI technique Save
- Design and Analysis of a High-Speed Approximate Restoring Array Based Log Divider (ARLD) Save
- Design and Evaluation of Approximate Radix-4 Partial Product Generators for Hardware-Efficient Multiplication Save
- Hardware Implementation of Deep Neural Network Using Various Multipliers Save
- SUBSYSTEM DESIGN FOR NEUROMORPHIC COMPUTING Save
- Design and analysis of energy-efficient floating point logarithmic piecewise approximate multiplier Save
- Dynamic precision configurable multiply and accumulate architecture for hardware accelerators Save
- Implementation of Bitwise Logic Operations using 8T SRAM Cells for In-Memory Computing Save
- Implementation of Neuron Design with Different Activation Functions on FPGA Save
- Analysis of Pseudo Static Domino Logic with Diode-Connected Footer Transistors Save